Job Description

Job Description

You will be part of an innovative new single and multiport SRAM technology development. As a physical design engineer, you will be responsible for creating and maintaining our patented SRAM macros. You will be responsible for generating all views required for the leaf cells used in the macro generation (LEF, Abstract, .lib, etc).

You should expect to interact with circuit designers who create leaf cells, understand the principle of operation and be involved in creating views for Innovus as well verifying layout with DRC/LVS tools. You will also establish pwr/gnd grid and psub/nwell tap grid for the larger macros.

Responsibilities:

• Circuit simulation and characterization of leaf cells using liberty/Viola/etc.
• Develop and maintain structured routing of memory macros
• Work with IP teams to ensure validity, completeness and usability of developed collateral (LIB/LEF etc.)
• Participate in all SOC level signoff checks and generate final GDS2 for delivery to foundry.

Requirements:

• BS EE + 7 years combined experience in physical and circuit design
• Tape out experience in advanced technology node (5nm or below)
• Experience with CTS of high speed clocks (3GHz +)
• Experience in abstract generation
• Good coding skills, experience developing scripts for use by others
• Programing languages: TCL
• Tools: Innovus, Pegasus/ICV, Primetime/Tempus, Voltus , Viola/liberty
• Excellent team player, innovative and self-driven with good communication skills
• Enjoy working in a small team environment in a startup company.

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